Gopalakrishnan Srinivasan

Assistant Professor

Hardware-Software Co-design for Machine Learning Neuromorphic Computing Spiking Neural Networks AI Accelerator Architecture RISC-V SoC Architecture and Design

Dr. Gopalakrishnan Srinivasan received B.Tech. in Electrical and Electronics Engineering from the National Institute of Technology Calicut, India, in 2010. He subsequently received his Master of Science in Computer Engineering from the North Carolina State University, Raleigh, NC, in 2012, and PhD in Electrical Engineering from Purdue University, West Lafayette, IN, in 2019. He is currently an Assistant Professor in the department of Computer Science and Engineering at IIT Madras. His research entails developing bio-plausible (neuromorphic) machine learning algorithms and hardware architectures for energy-efficient computing at the edge. His doctoral dissertation proposed brain inspired spiking neural network architectures (convolutional and recurrent) and learning methodologies (unsupervised, supervised, and semi-supervised) for image and speech recognition tasks. His dissertation research on stochastic spiking neural network and its energy-efficient hardware implementation was covered in press by the Purdue Research Foundation, Tech Xplore, and ScienceDaily. His research has been featured in conferences like the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), IEEE Conference on Computer Vision and Pattern Recognition (CVPR), the International Conference on Learning Representations (ICLR), IEEE International Joint Conference on Neural Networks (IJCNN), IEEE Design, Automation and Test in Europe (DATE) Conference and Exhibition, Design Automation Conference (DAC), and IEEE International Electron Devices Meeting (IEDM).

Dr. Gopalakrishnan Srinivasan also had a distinguished career in industry prior to venturing into academia. He started his career (after obtaining his Master’s) as a Digital Design Engineer in Cirrus Logic, Austin, TX, where he was involved in the design and verification audio ICs. During his PhD, he interned with the ASIC and VLSI Research group at Nvidia, where he worked on the design and verification of digital modules using object-oriented SystemC/ C++. Post his PhD, he joined MediaTek as a Staff Engineer, where he was involved in architecture pathfinding, performance modeling, and RTL design of the next generation of deep learning accelerator. He then moved to Apple as a Machine Learning Platform Architect, where he carried out architecture research and performance modeling of the Apple Neural Engine to efficiently accelerate machine learning workloads. He subsequently moved to India and joined Mindgrove Technologies, which is a startup specializing in building RISCV-based SoCs. He currently serves as their lead architect and consultant, responsible for driving the design of a multicore SoC targeting vision applications.